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Programmable IP Design Validation Engineer

Intel

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Job Details

Location: 01-13, Tesco Extra Penang, Jalan Sungai Dua, Taman Pekaka, 11700 Gelugor, Penang, Malaysia Posted: Aug 10, 2019

Job Description

Job ID: JR0099818 Job Category: Engineering Primary Location: Penang, PNG MY Other Locations: Job Type: Experienced Hire

Programmable IP Design Validation Engineer

Job Description
Intel PSG offers a large selection of intellectual property IP cores optimized for Intel FPGA devices, all of which are developed for highest performance, lowest cost, ease of use and fastest time-to-market.The Programmable IP Engineering group is responsible for High Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA emulation prototyping and hardware validation using Quartus Development Kit.As an IP Design Engineer focusing on IP Verification & Validation, you will be responsible for carrying out design validation for Intel next generation IP's across the Intel FPGA IP product portfolios. The charter of IP verification & validation team is to verify and validate the IP for robust functionality from functional simulation, FPGA emulation prototyping, hardware to complex system level environment. The verification and validation areas encompass IP's for external memory interface protocols eg. DDR, HBM and high-speed transceiver protocols eg. PCIe, Ethernet, Interlaken, JESD204, UPI, Serial Lite, Serial Rapid IO. Your specific responsibilities and career experience may include but are not limited to the following:1 Create comprehensive verification and validation plan based on IP/FPGA architecture specifications and carry out all the IP validation tasks. The plan encompasses functional, system level and hardware verification and validation perspectives.2 Developing IP/subsystem/system level testbench, create tests, and necessary coverage goals based on specification to verify the implementation.3 Review verification and validation results against the coverage goals. Writing, analyzing and achieving coverage metrics with failures debugging as well as bug filling and closure.4 Work with cross-functional teams and prepare/support IP functional validation tests for IP bring-up on actual FPGA development kits using Quartus.5 Build IP FPGA emulation prototypes, creating and establishing IP subsystem/solution validation coverage strategy and standardized framework, drive system test design implementation and overall IP system validation on HW, maximize FPGA hardware capability to bring substantial improvement to IP quality & usability for Intel FPGA IP product portfolios.6 Developing verification and validation tools and flows, as needed.7 Interfacing with 3rd party vendors for latest industry tool and methodology or VIP exposure and evaluation.8 Participate in IP roadmap planning with product marketing as well as support interface to IP customer support team. 9 Apply advanced techniques to achieve verification and validation with the highest quality, productivity, and time-to-market.10 Provide practical, innovative solutions to complex problems.11 Participating in technical paper writing and publication.


Qualifications
Qualifications
The successful candidate's qualifications should include the following:1 Bachelor's degree in Electrical, Electronics, Computer Engineering or equivalent.2 Experience in FPGA, custom IC or ASIC design and/or verification, demonstrated excellence in any of the product development areas from architecture, design, validation to product.3 Experienced using advanced system design and validation methodologies and technologies such as FPGA prototyping, emulation, simulation and co-emulation.4 Experienced using advanced verification methodologies such as UVM, OVM, VMM, System Verilog, constrained-random verification, assertion-based verification, and functional coverage techniques is a strong plus.5 Experienced creating and executing validation plans.6 Experience of leading a verification or validation team is a strong plus.7 Familiarity or experience in RTL design with Verilog and/or VHDL is a strong plus.8 Familiarity or experience in embedded SW & HW design is a strong plus.9 Knowledge of any memory interface protocol such as DDR, HBM or high speed serial system interfaces such as PCIe, Ethernet, IEEE 1588, UPI, JESD204, Interlaken, Serial Lite or Serial Rapid IO is a strong plus.10 Familiarity with Perl, TCL and shell scripts is a plus.11 Familiarity with Intel Quartus or Xilinx Vivado is a plus.12 Highly motivated to learn and adapt to fast-changing technologies and environments.13 Exceptional analytical, problem solving and communication skills, initiative, promote innovation and teamwork. Self-motivated and ability to excel in a team environment.14 Demonstrates fundamental values such as accountability, integrity and a winning mindset.15 Willingness to travel.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

About Intel

Intel's innovation in cloud computing, data center, Internet of Things, and PC solutions is powering the smart and connected digital world we live in.

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